Company
We design the silicon IP that storage and signal systems are built on.
PaxQubit is the semiconductor IP business of PyeongJeong Technology Co., Ltd. We license synthesizable RTL — not black boxes — for error correction, cryptography, signal processing and storage interfaces.
Where our IP comes from
Our cores did not begin as datasheet exercises. Each one was written because a real system needed it: an ECC engine strong enough for the newest NAND process, a key-derivation block that had to unlock a drive in a fraction of a second, a receiver that had to hold its signal-to-noise ratio in a live broadcast channel, a host controller that had to move data over a link with no room for a dropped frame.
That origin shapes how the IP is built. A core designed inside a working system carries the awkward parts with it — reset behaviour, clock-domain crossings, error recovery, the register semantics a driver actually needs. Those are the details that turn a clean block diagram into six months of integration, and they are already handled here.
What we license is the distilled result: the same RTL, cleaned of project-specific assumptions, parameterised, given its own testbench and timing constraints, and documented so that a team that has never met us can bring it up.
How we work
RTL you can read, own and port
Every core ships as pure, vendor-primitive-free RTL with its own testbench and constraints. It synthesizes on FPGA for evaluation and moves to ASIC without a rewrite — no encrypted netlist, no lock-in to one foundry or EDA vendor, no expiring key to renegotiate.
Verified against something real
We verify against genuine reference output rather than our own assumptions: published standard vectors, listings from the official vendor assembler, byte-exact comparison with reference implementations, live-channel field measurement, and regression suites that must pass on three independent simulators before a core is called done.
Scope stated, not implied
Where a core implements a subset of a standard, the product page says which subset — supported gears and modes, unsupported options, known deviations and the driver-side workaround for each. A buyer should learn the limits from us during evaluation, not from integration.
From evaluation to joint development
Engagements start wherever you need: a straight licence for a finished core, customisation against your requirement, or joint development for a core still taking shape. Delivery includes integration support and the specification behind the decisions, not just a file drop.
Ways to engage
01
IP licence
Take a finished core as it is — RTL, testbench, constraints, integration guide and support for the bring-up period.
02
Customisation
Parameters, interfaces or performance points adjusted to your requirement, delivered with the verification updated to match.
03
Joint development
For a core still taking shape, or a block that does not exist yet — scope, milestones and IP ownership agreed up front.
Portfolio
11 IP cores across five families — the full datapath of a modern storage or signal-processing SoC.
Error correction (3)
BCH and LDPC families for NAND flash, plus quantum syndrome decoding research.
Security & crypto (2)
AES and PBKDF2 key derivation — the encrypt-and-unlock half of a self-encrypting drive.
Signal processing & compute (4)
A direct-sampling FM/DDC receiver and legacy-compatible DSP cores for obsolete parts.
Storage interface (1)
UFS host controller with AXI4 DMA and the full UniPro link stack.
Processor & SoC (1)
A 32-bit RISC-V soft processor with valid-ready interconnect and tightly-coupled memory.
Where we are
Our office and lab are in the ITECO complex in Hanam, within the Seoul metropolitan area. Visitors are welcome by appointment; the nearest station is a short walk away.
(12930) #849 ITECO, 150 Jojeong-daero, Hanam-si, Gyeonggi-do, Republic of Korea
Subway Line 5, Hanam-Pungsan Station, Exit 6
Company information
| Legal name | PyeongJeong Technology Co., Ltd. |
|---|---|
| Business reg. no. | 303-81-76053 |
| Address | #849 ITECO, 150 Jojeong-daero, Hanam-si, Gyeonggi-do, Republic of Korea |
| Telephone | 031-790-1052 (+82-31-790-1052) |
| Fax | 031-790-1053 |
| yimidi@daum.net |
Talk to the engineers who wrote the RTL
Send the target process, throughput and interface requirement — an engineer answers directly, and full datasheets are available on request.